Summer School Tutorials

Tutorial Talks

Here are the currently confirmed tutorial talks!

  • Hands-on introductory tutorial on hardware accelerated machine learning for network intrusion detection
  • Lecturers: Nele Mentens, Wouter Hellemans, Jelle Biesmans

  • Abstract: In today’s interconnected world, network security remains vital. One essential component therein is network intrusion detection, where some intrusion detection system (IDS) inspects network traffic to detect anomalies. In this session, we investigate how convolutional neural networks (CNN) can be used to construct IDSs that can be accelerated on Field-Programmable Gate Arrays (FPGA) for high- throughput applications. For this purpose we use Brevitas and FINN, two free and open source frameworks developed by AMD Xilinx to quantize neural networks and then translate them to High-Level Synthesis (HLS), which in turn can be used to generate specialized hardware.

  • Reverse Engineer ECC implementations Using Side-Channel Analysis
  • Lecturers: Ján Jančár, Łukasz Chmielewski

  • Abstract: SCA is a relatively new research area in applied cryptography that has continuously gained prominence since the late nineties. In SCA, attackers closely monitor side channels, like the power consumption or electromagnetic emission, of a cryptographic device, and they are able to extract the secret key using statistical techniques. This field is particularly interesting since SCA poses a unique challenge as an intersection of cryptography, electronics, and statistics and affects all aspects of modern hardware security.

  • Cryptographic Hardware Optimization for ASIC
  • Lecturer: Patrick Schaumont

  • Abstract: Cryptographic hardware are specialized computation structures dedicated to the execution of a single or a few cryptographic algorithms. Through specialization, hardware achieves higher performance, lower power consumption, and lower silicon cost compared to equivalent cryptographic software implementations. The difference in efficiency can be orders of magnitude. Yet, while the performance benefits of hardware are well understood, the cryptographic engineering community is generally unfamiliar with the process of mapping algorithms to hardware structures. For example, reference implementations of new cryptographic standards are more commonly found in software than in hardware. With the advent of open source hardware design tools, and especially open-source ASIC design tools, a great opportunity exists for a culture of hardware engineering in the cryptographic community. The potential gains of cryptographic implementations in efficiency, in scope, and in innovation are simply too big to ignore the hardware design domain.

  • Cryptographic Vulnerabilities and How To Find Them
  • Lecturers: Kien Tuong Truong, Kenny Paterson

  • Abstract: Cryptography is notoriously hard to get right in practice. Creating a secure cryptographic protocol is a non-trivial task that, as in the case of TLS 1.3, can take many years of design iteration on the part of a large group of experts to get right. In an ideal world, formal analysis techniques would be used to analyze protocol specifications before developers start work on implementing them. Meanwhile, in the real world, complex systems using cryptography frequently get developed and rolled out without even having a specification, never mind any kind of formal verification having been done on them. This leads to many such systems containing severe cryptographic flaws, as recent analyses of systems like MEGA, Matrix, Bridgefy and Threema have demonstrated. How can such flaws be identified and exploited?

  • The Hitchhiker’s Guide to the Security and Privacy of Federated Learning
  • Lecturer: Ahmad-Reza Sadeghi, Alessandro Pegoraro, Phillip Rieger

  • Abstract: The widespread and increasing deployment of Artificial Intelligence (AI) also enlarges the attack surface and requires new security and privacy-enhancing methodologies and technologies. One approach that has been gaining significant growth in recent years is Federated Learning (FL), which enables multiple parties to collaborate in training a neural network model. Instead of sharing their individual data, each participant trains its own neural network locally and shares only the parameter of the trained model, allowing the participants to maintain the privacy of their private datasets.

  • Tamarin Prover Tutorial
  • Lecturers: Cas Cremers, David Basin

  • Abstract: The Tamarin prover is a state-of-the-art automated security protocol analysis tool that can be used to prove protocol properties and also automatically find attacks. Tamarin has been successfully used to analyze multiple versions of TLS 1.3, the mobile communication standard 5G, group key agreement protocols, the EMV chip-and-pin standard, as well as many other protocols, leading to the discovery of subtle attacks or automated proofs.

  • Implementing cutting-edge isogeny-based cryptography for beginners
  • Lecturers: Lorenz Panny, Krijn Reijnders

  • Abstract: In this tutorial, we will teach you everything you need to know about elliptic curves and isogenies. You will go from ignoramus to isogenist in three easy steps!

    • 1. Curves: The first step are elliptic curves: We explain the basics of elliptic-curve arithmetic for Montgomery curves, which you will then implement by yourself.
    • 2. Isogenies: The second step are isogenies: “nice” maps between elliptic curves. We explain how such maps are used and computed, so that you can implement isogeny arithmetic using your own elliptic-curve implementation.
    • 3. SQIsign: We are then ready for the final step: SQIsign verification. This uses the tools built in the two steps above in a specific way. We will detail this verification minutely, so that you’ll be able to implement it without spending years on reading papers first.

  • Design and Verification of Side-Channel Resistant Implementations
  • Lecturers: Vedad Hadžić

  • Abstract: Embedded devices often work with security-critical data while simultaneously being exposed to uncontrolled environments, making them the prime target for physical side-channel attacks such as differential power analysis. The most reliable and theoretically sound countermeasure against such attacks is masking, where secrets and data processed by the device are split into multiple random shares, all of which are necessary to recover the original. Although the idea of masking is simple, implementing it properly in either hardware or software is challenging and littered with pitfalls. Moreover, practically evaluating the security of masked designs is time-consuming and requires elaborate measurement setups. However, formal verification of masked designs has recently gained traction because it provides formal guarantees of side-channel security and simultaneously speeds up the iterative process of designing secure implementations.




Tutorial Lecturers

Here are the currently confirmed lecturers!

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Nele Mentens

KU Leuven, Belgium Leiden University, The Netherlands
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Wouter Hellemans

KU Leuven, Belgium
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Jelle Biesmans

KU Leuven, Belgium
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Łukasz Chmielewski

Masaryk University, Czech Republic
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Ján Jančár

Masaryk University, Czech Republic
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Patrick Schaumont

Worcester Polytechnic Institute, MA, USA
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Ahmad-Reza Sadeghi

TU Darmstadt, Germany
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Alessandro Pegoraro

TU Darmstadt, Germany
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Phillip Rieger

TU Darmstadt, Germany
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Kien Tuong Truong

ETH Zurich, Switzerland
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Kenny Paterson

ETH Zurich, Switzerland
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David Basin

ETH Zurich, Switzerland
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Cas Cremers

CISPA Helmholtz Center for Information Security in Saarbruecken, Germany
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Lorenz Panny

Technical University of Munich, Germany
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Krijn Reijnders

Radboud University, The Netherlands
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Vedad Hadžić

TU Graz, Austria